Digital Electronics & Microprocessors Test - 5

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DigitalElectronics
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Microprocessors

Test-05Solutions

DIGITAL ELECTRONICS & MICROPROCESSORS
1. Ports are used to connect the CPU to which of the following

units?
1. Printer
2. Floppy disk drives
3. Video display unit
4. Incoming power supply
Select the correct answer using the codes given below:
a) 1 and 2
b) 2 and 3
c) 3 and 4
d) 1 and 3
Answer: (d)
Solution:
Incoming power supply is not connected through port to CPU.
Also floppy disk drives are not connected to CPU through port.
2. Statement (I): In 8255, port A can work as input port only.
Statement (II): Port A can work in mode 0, mode 1 or mode 2.
a) Both Statement (I) and Statement (II) are individually true

and Statement (II) is the correct explanation of Statement (I).
b) Both Statement (I) and Statement (II) are individually true

but Statement (II) is not the correct explanation of Statement
(I).
c) Statement (I) is true but Statement (II) is false.
d) Statement (I) is false but Statement (II) is true.

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Answer: (d)
Solution:
Features of 8255
• Three 8-bit I/O ports PA, PB, PC.
• PA can be set for modes 0, 1, 2.
• PB for 0, 1.
• PC for mode 0.
3. Statement (I): The main difference between a microprocessor
and a micro-controller is that the former does not have any on
chip memory
Statement (II): A microprocessor does not need memory to run
programmes.
a) Both Statement (I) and Statement (II) are individually true

and Statement (II) is the correct explanation of Statement (I).
b) Both Statement (I) and Statement (II) are individually true

but Statement (II) is not the correct explanation of Statement
(I).
c) Statement (I) is true but Statement (II) is false.
d) Statement (I) is false but Statement (II) is true.
Answer: (c)
Solution:
Statement-II is wrong, microprocessor need memory to run
programmes but the memory used by microprocessor is
provided externally.

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4. The logic function f = (x. y) + (x. y) is the same as
a) f = (x + y)(x + y)

b) f = (x + y) + (x + y)

c) f = (x. y) + (x. y)

d) None of (A), (B), (C)

Answer: (d)

Solution:

F = x��⨁��y� = xy + x� y�

5. For a 3-input logic circuit shown below, the output Z can be
expressed as

a) Q + R
b) PQ + R
c) Q + R
d) P + Q + R
Answer: (c)
Solution:

Z = �P��Q��.��Q��. �Q��.��R�� = P. Q� + Q� + Q. R
= Q� + Q. R
= Q� + R

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6. The 8259 A programmable Interrupt controller can
1. Manage eight interrupts
2. Vector an interrupt request anywhere in memory may
3. Have 8-bit or 16-bit interval between interrupt vector
locations
4. Initialized with operational command words (OCWs)
a) 1 and 2
b) 2 and 3
c) 3 and 4
d) 1, 2, 3 and 4
Answer: (d)
Solution:
82594 programmable interrupt controller can
→ manage eight interrupts
→ vector an interrupt anywhere in memory map
→ initialized with operational command words (OCWs)
So, option (d) is correct.

7. In 8085 microprocessor with memory mapped I/O which one of
the following is correct?
a) I/O devices have 16 bit addresses
b) I/O devices are accessed during IN and OUT instructions
c) There can be a maximum of 256 input and 256 output devices
d) Logic operations cannot be performed
Answer: (a)

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Solution:
Memory mapped I/O address is of 16-bits
8. The minimum number of two input NAND gates a needed to
perform the function of a two input OR gate is
a) one
b) two
c) three
d) four
Answer: (c)
Solution:

9. Direct Memory Access channel (DMA) facilitates data to move
in and out of the system
a) on first-come first-serve basis
b) with equal time delay
c) without a sub-routine
d) without programme intervention
Answer: (d)
Solution:
In DMA data transfer scheme, data are directly transferred from
an I/O device For DMA data transfer, the data and address buses
come under the control of the peripheral device which wants

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DMA data transfer, and this process is done without program
intervention.
10. If (327)9 = (x)5, then the value of x is given by
a) 327
b) 268
c) 2033
d) 3302
Answer: (c)
Solution:
Convert (327)9 into decimal,
(327)9 into decimal = 3 × 92 +2 × 91 + 7 × 90

= 243 + 18 + 7 = 268
= (268)10
11. A microprocessor based safety control system installed in a
nuclear power plant must be stress tested under which of the
following conditions?
1. Ageing due to radiation
2. Thermal stresses
3. Seismic vibration
4. Inadequate nuclear reactor coolant
a) 1 and 2 only
b) 2 and 4 only
c) 1, 2 and 3 only
d) 1, 2, 3 and 4
Answer: (d)

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12. The output f of the 4-to-1 MUX shown in fig.is

a) xy + x
b) x + y
c) x + y
d) xy + x
Answer: (b)
Solution:

XY F
00 0
01 1
10 1
11 1
i. e. , F = x + y
13. In Intel 8085 A microprocessor ALE signal is made high to
a) Enable the data bus to be used as low order address bus.
b) To latch data D0 – D7 from data bus
c) To disable data bus
d) To achieve all the functions listed above
Answer: (a)

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14. Consider the logic circuit shown in the figure given below. The
functions f1, f2 and f (in canonical sum of products form in
decimal notation) are:

f1(W, x, Y, Z) = Σ 8, 9, 10
f2(W, x, Y, Z) = Σ 7, 8, 12, 13, 14, 15
f(W, x, Y, Z) = Σ 8, 9

Which one of the following is the function f3?
a) ∑ 9, 10
b) ∑ 9
c) ∑ 1, 8, 9
d) ∑ 8, 10,15

Answer: (b)

Solution:

For OR gate, 1 + f3 = 1
As, 0 + f3 = f3
So, f = δΣ(8, 9)
f = 1 for f ′ = Σ(8)
f = 1 for f3 = Σ(9)

f3 = Σ9

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15. Consider the following statements:
1. SRAM is made up of flip-flops.
2. SRAM stores bit as voltage.
3. DRAM has high speed and low density
4. DRAM is cheaper than SRAM.
Which of the above statements are correct?
a) 1, 2 and 3
b) 1, 3 and 4
c) 2, 3 and 4
d) 1, 2 and 4
Answer: (d)
Solution:
A DRAM (Dynamic Random Access Memory) has low speed,
higher capacity lower power consumption. So the statement 3 is
not correct.

16. Three devices A, B and C have to be connected to an 8085
microprocessor. Device A has highest priority and device C has
the lowest priority. In this context, which of the following is
correct assignment of interrupt inputs?
a) A uses TRAP, B uses RST 5.5 and C uses RST 6.5
b) A uses RST 7.5, B uses RST 6.5 and C uses RST 5.5
c) A uses RST 5.5, B uses RST 6.5 and C uses RST 7.5
d) A uses RST 5.5, B uses RST 6.5 and C uses TRAP
Answer: (b)

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Solution:
Priority order is TRAP (RST – 4.5), RST 7.5 RST 6.5, RST 5.5
17. Assertion (A): Any Boolean function can be realized by using
a suitable multiplexer.
Reason (R): A multiplexer can be realized using NAND and
NOR gates, which are universal gates.
a) Both A and R are true, and R is the correct explanation of A.
b) Both A and R are true, but R is not a correct explanation of

A.
c) A is true, but R is false.
d) A is false, but R is true.
Answer: (a)
Solution:
Boolean function can be realized by NAND and NOR gate.
18. DB, DW and DD directives are used to place data in particular
locations or to simply allocate space without pre-assigning
anything to space. The DW and DD directions are used to
generate
a) offsets
b) full address of variables
c) full address of labels
d) offsets or full address of labels and variables
Answer: (c)

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19. Assertion (A): Instruction SIM is necessary to implement the
interrupts INTR.
Reason (R): INTR requires external hardware for
implementation,
a) Both A and R are true and R is the correct explanation of A.
b) Both A and R are true but R is NOT the correct explanation
of A.
c) A is true but R is false.
d) A is false but R is true.
Answer: (d)
Solution:
R is correct as INTR requires external hardware for
implementation. A is incorrect as SIM is necessary to
implement.
RST 7.5 RST 6.5 RST 5.5 not INTR

20. If an original MIB microcomputer operates at 5 MHz with an 8
bit bus and a newer version operates at 20 MHz with a 32 bit
bus, compute (approximately) the maximum speed-up possible
a) 2
b) 4
c) 6
d) 16
Answer: (d)

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21. If X1 and X2 are the inputs to the circuit shown in the figure,
the output Q is

a) X1 + X2
b) X1 • X2
c) X1 • X2
d) X1 • X2
Answer: (d)
Solution:
Q1 acts as inverter with output X1 and Q2 and Q3 acts as NOR
gate with inputs X1 and X2.

X1 + X2 = X1 • X2
22. The output f of the 4-to-1 MUX shown in the below figure is

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a) (x + y)’ + x
b) x + y
c) x’ + y’
d) xy + x’
Answer: (b)
Solution:
Truth table:

XY F
00 0
01 1
10 1
11 1

f=x+y
23. The set of commands which give directions to the assembler

during the assembly process but are not translated into machine
instructions are called
a) mnemonics
b) directives
c) identifiers
d) operands
Answer: (b)
24. Four 8-input multiplexers drive a single 4-input MUX. What is
the result?
a) 4-input MUX
b) 8-input MUX

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c) 12-input MUX
d) 32-input MUX
Answer: (d)
Solution:

25. Setting contents of a register to zero can be efficiently done by
a) Mov immediate instruction using zero as immediate data
b) AND immediate instruction using zero as immediate data
c) XOR in register with itself
d) none of these
Answer: (c)

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26. Consider the following statements:
1. The output unit of a computer communicate the response of
the computer to the user.
2. Read/write memory is volatile.
3. The flip-flops in a register are connected in parallel.
Which of these statements is/are correct?
a) 1 only
b) 1 and 2
c) 2 and 3
d) 3 only
Answer: (b)
Solution:
RAM (read/write memory) is a volatile memory i.e. data stored
is lost when power is off
In SIPO (serial in parallel out) register flip-flops are connected
in series.

27. What is the output of the code converter constructed using a 4
bit full-adder MSI circuit as shown in the below figure?

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a) 2-4-2-1 code
b) Excess-3code
c) Biquinary code
d) EBCDIC code
Answer: (b)
Solution:
In this circuit we are adding A4 A3 A2 A1 into B4 B3 B2 B1.
Here, B1 = B2 = 1, B4 = 0, B3 = C1
B4 B3 B2 B1 → OC1 11
We are adding B2 B1 → 11 → 3 into A4 A3 A2 A1.
Its output will be Excess-3 code.
It’s a BCD to Excess-3 code.
28. The bus which is used to transfer data from main memory to
peripheral device is
a) data bus
b) input bus
c) DMA bus
d) output bus
Answer: (c)
29. Which one of the following is not a vectored interrupt?
a) TRAP
b) INTR
c) RST 7.5
d) RST 3
Answer: (b)

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Solution:
Interrupt request (INTR) is a non-vectored interrupt
30. The Circuit in the figure given below has two CMOS NOR
gates. The circuits function as a/an

a) Flip-flop
b) Mono stable multivibrator
c) Schmitt trigger
d) Astable multivibrator
Answer: (b)
Solution:
V0 = 0 is a stable state.
When NOR gate is triggered output is zero, so capacitor charges
through R. Finally input of NOT gate = 0 which gives output = 1
When V0 = 1, output of NOR gate goes to zero. Capacitor
discharges through output of NOR gate.

Again input level of NOT gate = 1 which makes output = 0
So it’s a monostable multivibrator.

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