Analog Electronics Test - 1 - PDF Flipbook
Analog Electronics Test - 1
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GATE
EEE
Analog
Electronics
Test-01Solutions
ANALOG ELECTRONICS
1. The wave shape of V0 in Fig. is
Answer: (a)
Solution:
During +ve half cycle D2 acts as voltage regulator
1 acts as a PN diode short circuited during forward bias.
When input applied > 4.1V D2 starts conducting.
1
Similarly, during negative cycle D1 acts as voltage regulator,
D2 is forward biased.
2. The quiescent collector current IC, of transistor is increased by
changing resistances. As a result
a) gm will not be affected
b) gm will decrease
c) gm will increase
d) gm will increase or decrease depending upon bias stability.
Answer: (c)
Solution:
↑ = ( ) ↑
If quiescent collector current increases the Trans conductance
(gm) also increases.
2
3. Consider the following statements in relation to a large value of
capacitor filter used in a full-wave rectifier: It gives the
1) low conduction period for the diode rectifier.
2) increased peak current rating of the diode.
3) large peak inverse voltage rating of the diode
Which of these statements are correct?
a) 1, 2 and 3
b) 2 and 3
c) 1 and 2
d) 1 and 3
Answer: (c)
Solution:
= =
T = +
When C increases; increases
⟹ decreases
⟹ Conduction period decreases.
Larger value of capacitor requires larger current to charge it.
4. Match List-I (Circuit) with List-II (Property) and select the
correct answer using the codes given below the lists.
List-I
A. R-C coupled single-stage amplifier
B. Emitter follower
C. Common base amplifier
D. Darlington amplifier
3
List-II
1. Beta multiplier
2. Constant current source
3. Very high input impedance
4. Phase inverter with voltage gain
Codes:
ABC D
a) 3 4 1 2
b) 4 3 1 2
a) 3 4 2 1
b) 4 3 2 1
Answer: (d)
Solution:
Darlington circuit is known as beta multiplier or super beta
transistor.
5. The circuit below implements a filter between the input current
and the output voltage vo. Assume that the op-amp is ideal. The
filter implemented is a
a) low pass filter
b) band pass filter
4
c) band stop filter
a) high pass filter
Answer: (d)
Solution:
Apply KCL at ‘a’
I1 + I2 = i
+ = i
1 1
0 � 1 + 1 1 1� = i
0 = i� 1 + 1 1 1� = i� + 1 1⁄ 1� = i 1 � + 1 ⁄ 1�
⸫ High pass filter
6. CE configuration is the most preferred transistor configuration
when used as a switch because
a) it requires only one power supply
b) it requires low voltage or current for operating the switch
c) it is easily understood by every one
d) it has small
Answer: (b)
5
7. The transistor as shown in the circuit is operating in
a) Cut-off region
b) Saturation region
c) Active region
d) Either in active or saturation region
Answer: (b)
8. An FET is a better chopper than a BJT because it has
a) lower offset voltage
b) higher series ON resistance
c) lower input current
d) higher input impedance
Answer: (a)
Solution:
FET exhibits no offset voltage at zero drain current, and hence
makes an excellent signal chopper.
9. Which one of the following statements is correct?
If in a double tuned voltage amplifier, the mutually coupled
secondary and primary are synchronously tuned with equal Q-
values then for the over-coupled case the maximum voltage
amplification.
6
a) is greater than that for critical coupling and the amplifier
characteristic is double peaked
b) is less than that for critical coupling and the amplifier
characteristic has a single peak
c) is same as that for critical coupling and the amplifier
characteristic is double peaked
d) is less than that for critical coupling and the amplifier
characteristic is doubled peaked
Answer: (d)
10. In the figure, Dl is a real silicon Pn junction diode with a drop of
0.7V under forward bias condition and D2 is a Zener diode with
breakdown voltage of – 6.8V. The input Vin(t) is a periodic square
wave of period T, whose one period is shown in the figure.
Assuming 10
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